During production of semiconductor substrates or wafers, it is commonly necessary to perform gettering to remove unwanted impurities, for example, heavy metals, from the active areas of the wafer (e.g. where circuit devices are formed). For wafers formed by conventional techniques (e.g. "bulk wafers"), for example, by the Czochralski method, a variety of effective gettering techniques have long been employed. Generally, the methods involve creating a gettering site at or near the back side of the wafer where circuit devices are not planned to be formed. For example, the back side of the wafer may be intentionally damaged by ion implantation, thereby forming crystalline defects which draw impurities from throughout the wafer. Another technique deposits a layer of metal, such as tin or lead, or polysilicon on the back side of the wafer to act as a sink for gettering.
An alternative method of producing semiconductor wafers currently being pursued in the art and referred to as Silicon On Insulator (SOI) involves the formation of a thin monocrystalline silicon film on an insulating substrate, an example of which is shown in FIG. 1. With reference to FIG. 1, the SOI wafer 100 includes a base or substrate 112, most commonly comprising silicon or another semiconductor material, an insulating layer 114, most commonly comprising silicon dioxide, and a thin film semiconductor layer 116, most commonly comprising silicon. It is the thin film semiconductor layer 116 in which circuit devices are formed. The thinness (e.g. on the order of 1000 .ANG.) of the semiconductor layer 116 and the insulating layer beneath the semiconductor layer 116 causes device properties which result in greater switching speed and higher current drive capability than that achieved with devices formed in conventional wafers. Thus, critical to the performance and manufacturability of the devices is the ability to accurately control both the nominal thickness and the uniformity of the thickness of the semiconductor layer 116.
SOI wafers are formed by a variety of methods. A first group of methods known as Separation by Implanted Oxygen (SIMOX) involve implanting oxygen inside a silicon substrate 112 to form a buried insulating layer 114 of SiO.sub.2 at a prescribed depth. After the implant, a thin silicon layer 116 is present on the SiO.sub.2 layer 114. The entire wafer 100 is then subjected to a heat treatment to remove or repair defects in the thin silicon layer 116, now referred to as the SOI layer, caused by the implant. A second group of methods involves forming a surface oxide on each of two separate silicon substrates, placing the substrates one on top of the other with the surface oxides in contact, and bonding the substrates together at the junction formed by the surface oxides by an appropriate heat treatment.
Conventional metal gettering methods, as introduced above, are generally ineffective for gettering SOI wafers. Since the conventional methods getter from the back-side of the wafer, the insulating layer 116 of the SOI wafer 100 frustrates such methods by blocking movement of impurities from the SOI layer 116 to the bulk substrate 112. While for bonded SOI wafers, there is some opportunity to interpose a gettering layer between the middle oxide and SOI layers, no such interposition methods for SOI wafers formed by the SIMOX method are known.
It would be desirable to apply a gettering layer such as polysilicon to the front of an SOI wafer to overcome the problems created by the insulating layer, but removing the polysilicon selectively to the underlying monocrystalline silicon without destroying the wafer is problematical. Etching techniques are generally impractical due to a lack of available etchants having a high selectivity (e.g. on the order of 100:1) to polycrystalline silicon over monocrystalline silicon. Thus, overetching of the polysilicon layer, as is common in the art to insure complete removal of the layer being removed, is likely to result in significant and uncontrolled reduction in the thickness of the monocrystalline silicon layer as well as roughening of or damage to the surface of the monocrystalline silicon layer, thereby rendering it unsuitable for forming devices therein. Since polysilicon in direct contact with monocrystalline silicon tends to grow epitaxially, particularly at the elevated temperatures normally used for gettering, removal by selective etching becomes impractical. Similarly, polishing the polysilicon layer down to the silicon is also uncontrolled; since polysilicon is visually indistinguishable from monocrystalline silicon, the point at which the monocrystalline silicon layer is reached cannot be accurately detected.
What is needed is an improved method of gettering an SOI layer.